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freewizard
V2EX  ›  0x10c

DCPU-16 1.1

  •  
  •   freewizard · 2012-04-26 14:52:33 +08:00 · 3553 次点击
    这是一个创建于 4354 天前的主题,其中的信息可能已经有所发展或是发生改变。
    http://www.reddit.com/r/dcpu16/comments/sqfre/rfe_dcpu16_11/


    Swapped the names of "a" and "b" to make it more clear what gets processed first, and to make special opcodes not have only a b value.
    Added a very basic interrupt handler
    Outlined some hardware detection basics
    Made the text 80 characters wide because 80's
    Implemented ALL of following:

    DCPU-16 Spec Suggestions
    =======================

    1. Evaluate b before a
    ----------------------------------------------
    This makes instructions that address the stack twice meaningful instead of confusing and useless.

    `ADD PEEK, POP` *should* pop the top of the stack and add it to the second entry, but currently the `PEEK` is evaluated before the `POP` occurs.

    2. Add [SP+next word] addressing
    ----------------------------------------------
    This makes writing functions that store extra variables or arguments on the stack easier.

    POP isn't useful as an a value, and PUSH isn't useful as a b value, so they should be combined into one value, with postincrement and predecrement determined by whether they're in a/b.

    3. Make opcodes 5 bits
    --------------------------------
    A literal a value is not very useful, and having 2x more opcodes is very useful.
    bbbbbbaaaaaaoooo
    becomes
    bbbbbbaaaaaooooo

    4. Make literal range include -1.
    -----------------------------------
    Shift the literal range from [0, 31] to [-1, 30].

    Having -1 as a literal lets you useful one-word instructions like:
    ``` NEG X --> MUL X, -1
    NOT X --> XOR X, -1```

    5. Rename O register to EX or OV
    -------------------------------------
    O and 0 are very easy to confuse, other special registers are two characters, and it doesn't always represent overflow.

    6. Add signed MUL/DIV instructions
    --------------------------------------
    Signed operations make maneuvers, targeting, and fixed-point trigonometry routines more efficient.

    Suggested mnemonics: `MLI`, `DVI`.

    7. Add signed right shift (ASR)
    -----------------------------------------
    Signed operations are useful.

    8. Add additional IF instructions
    ------------------------------------
    Supporting all the relations (<, >, <=, >=) will make assembly easier to write and read. Suggested mnemonics and effects:

    0x11: IFB a, b - performs next instruction only if (a&b)!=0 (Bit set)
    0x12: IFE a, b - performs next instruction only if a==b (Equal)
    0x13: IFN a, b - performs next instruction only if a!=b (Not equal)
    0x14: IFG a, b - performs next instruction only if a>b (signed) (Greater)
    0x15: IFA a, b - performs next instruction only if a>b (unsigned) (Above)
    0x16: IFL a, b - performs next instruction only if a<b (signed) (Less)
    0x17: IFU a, b - performs next instruction only if a<b (unsigned) (Under)


    Appendix A.
    ===========
    1. Fix line drawing characters
    ------------------------------
    As [jecowa noted on reddit](http://www.reddit.com/r/dcpu16/comments/sio8u/dcpu_font_help_what_are_those_first_30ish_glyphs/c4ekx9u), you can't make full boxes with the current line drawing characters.

    These 22 glyphs let you draw boxes:

    │─└┌┐┘┴├┬┤┼

    ║═╚╔╗╝╩╠╦╣╬

    Suggestions for extra 5 glyphs:

    ° (Degree) and ♠♥♦♣ (Card suits)

    Note that the full block █ with fg color X is equivalent to space with bg X. Replace it with a dithered ▒ half-block.
    1 条回复    1970-01-01 08:00:00 +08:00
    freewizard
        1
    freewizard  
    OP
       2012-04-26 15:01:51 +08:00
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